Chapter 3 · Foundations

Switching, PWM & Losses

A converter controls power by switching its transistors on and off tens or hundreds of thousands of times a second. This chapter looks closely at one switching cycle: how the duty cycle is set, what the voltage and current do during each transition, where every watt of loss comes from, and how that heat gets out of the device.

Pulse-width modulation

A switch-mode converter runs at a fixed switching frequency f_s. In each period T_s the switch is on for a time t_{on} and off for the rest. The ratio is the duty cycle D, and changing it is how the converter controls its output. This is pulse-width modulation (PWM).

Period and duty cycle

T_s = \frac{1}{f_s}, \qquad D = \frac{t_{on}}{T_s}

At 50 kHz the period is 20 µs; a duty cycle of 0.3 means 6 µs on and 14 µs off.

How PWM is generated

\text{switch on while } v_{control} > v_{carrier}

A controller compares a control signal with a sawtooth or triangle carrier at f_s. In practice a microcontroller's PWM timer does this digitally.

Inductors and capacitors average the chopped waveform, so the output follows the duty cycle rather than the individual pulses. The higher f_s, the smaller those inductors and capacitors can be for the same ripple. That is the main reason designers want to switch fast, and losses, the subject of the rest of this chapter, are the main reason they can't switch infinitely fast.

Inside a hard switching transition

Most converters switch an inductive load: an inductor holds the current roughly constant during the few nanoseconds of a transition, and a freewheeling diode carries that current whenever the transistor is off. This forces a particular sequence, shown in Figure 3.1:

Turn-on. The diode keeps conducting until the transistor has taken over the whole inductor current, so the transistor's current rises first, with the full voltage still across it. Only then can the diode block, and the transistor's voltage falls.
Turn-off. The reverse: the transistor's voltage must rise to the full DC voltage before the diode can start conducting, so the voltage rises first with the full current still flowing, then the current falls.

During both transitions the device carries high voltage and high current at the same time. The power p = v \cdot i spikes, and the energy in those spikes, E_{on} and E_{off}, is the switching loss.

Figure 3.1 — Idealised hard switching of an inductive load. The shaded intervals are where voltage and current overlap; their energy is lost on every cycle.

Every loss in a switch

The losses in a switching device fall into a few groups. The first is independent of frequency; the rest are energies lost once per cycle, so they scale with f_s:

Conduction

P_{cond} = I_{rms}^2 R_{DS(on)}

Or V_0 I_{avg} + r I_{rms}^2 for IGBTs and diodes (Chapter 2). Independent of f_s.

Switching (linear estimate)

P_{sw} \approx \tfrac{1}{2} \, V I \, (t_{on} + t_{off}) \, f_s

t_{on} and t_{off} are the total overlap times of each transition. A good first estimate before you have measured data.

Switching (from the datasheet)

P_{sw} = (E_{on} + E_{off}) \, f_s \, \frac{V}{V_{test}} \, \frac{I}{I_{test}}

Scale the datasheet energies from their test conditions to yours, using the same gate resistor and temperature where you can.

Output capacitance

P_{oss} = E_{oss} \, f_s \approx \tfrac{1}{2} \, C_{oss,eq} \, V^2 f_s

Energy stored in the device's own capacitance is dumped into the channel at every hard turn-on.

Diode reverse recovery

P_{rr} \approx Q_{rr} \, V f_s

Extra turn-on loss in the transistor, caused by the opposite diode's stored charge. Nearly zero with SiC Schottky diodes or GaN.

Gate drive

P_{g} = Q_g \, V_{drive} \, f_s

Dissipated mainly in the gate driver and gate resistor rather than the switch, but it sets the driver's power supply.

Worked example: one MOSFET at two frequencies

A MOSFET in a boost converter switches 400 V and 10 A with a duty cycle of 0.5. Its data: R_{DS(on)} = 0.1 Ω when hot, total overlap time t_{on} + t_{off} = 50 ns, C_{oss,eq} = 150 pF, Q_g = 60 nC driven at 15 V. The switch's RMS current is about I\sqrt{D} = 7.07 A, ignoring ripple. A SiC Schottky diode is used, so recovery loss is negligible.

Loss	Calculation	At 50 kHz	At 200 kHz
Conduction	7.07^2 \times 0.1	5.0 W	5.0 W
Switching	\tfrac{1}{2} \times 400 \times 10 \times 50\,\text{ns} \times f_s	5.0 W	20.0 W
Output capacitance	\tfrac{1}{2} \times 150\,\text{pF} \times 400^2 \times f_s	0.6 W	2.4 W
Total in the MOSFET		10.6 W	27.4 W
Gate drive (in the driver)	60\,\text{nC} \times 15 \times f_s	0.05 W	0.18 W

Quadrupling the frequency barely changes conduction loss but multiplies the switching losses by four, and the device now runs more than twice as hot. Faster devices, with shorter transition times and less capacitance, are what make high frequencies affordable: that is the practical advantage of SiC and GaN from Chapter 2.

Choosing the switching frequency

Raising f_s…	Benefit	Cost
Inductors and capacitors	Smaller and cheaper for the same ripple (Chapter 4)	Core and winding losses rise at high frequency (Chapter 9)
Switch losses		Switching losses rise in proportion
Control	Faster response to changes	Less time per cycle for the controller to compute
Acoustic noise	Above about 20 kHz the switching is inaudible
EMI		Faster edges and higher harmonics are harder to filter (Chapter 10)

In practice, IGBT inverters often run at a few kilohertz to about 20 kHz, silicon MOSFET DC-DC stages at tens to a few hundred kilohertz, and GaN converters can run in the hundreds of kilohertz or above.

Soft switching: removing the overlap

If the circuit arranges for the voltage across a switch to be zero before it turns on (zero-voltage switching, ZVS), or the current through it to be zero before it turns off (zero-current switching, ZCS), the overlap in Figure 3.1 disappears and so does most of the switching loss. Resonant converters such as the LLC (Chapter 7) are built around this idea.

Dead time in a half-bridge

Most converters use switches in pairs, one above the other across the DC supply: a half-bridge. If both were on at once, even for a few nanoseconds, they would short the supply. This is called shoot-through and can destroy both devices. The controller therefore turns one switch off and waits a short dead time t_d before turning the other on. During the dead time the current flows through one of the switches' diodes.

Dead time has two side effects: extra diode conduction loss, and a small error in the average output voltage, because for t_d the output is set by the current's direction rather than by the PWM signal:

Average voltage error from dead time

\Delta V \approx t_d \, f_s \, V_{dc}

Its sign depends on the direction of the output current. In an inverter it distorts the sine wave near each zero crossing, which is why controllers compensate for it (Chapter 6).

For example, t_d = 500 ns at f_s = 20 kHz on a 400 V DC link gives an error of 0.5 µs × 20,000 × 400 = 4 V. Faster switches need less dead time, which is another advantage of fast devices.

Getting the heat out

Every watt of loss heats the semiconductor junction, and the junction must stay below its maximum temperature, with margin, for the converter's whole life. Heat flows from the junction to the case, through a thermal interface material to the heatsink, and from the heatsink to the air. Each step has a thermal resistance in kelvin per watt, and they add up like resistors in series:

Steady-state junction temperature

T_j = T_a + P_{loss} \left( R_{th(j\text{-}c)} + R_{th(c\text{-}h)} + R_{th(h\text{-}a)} \right)

Junction-to-case comes from the datasheet, case-to-heatsink from the interface material, and heatsink-to-ambient from the heatsink and its airflow.

Worked example: sizing the heatsink

Take the 50 kHz MOSFET from the example above: 10.6 W of loss. Its R_{th(j\text{-}c)} is 0.5 K/W and the thermal pad adds 0.3 K/W. Inside an enclosure on a hot day the air reaches 50 °C, and we want the junction no hotter than 125 °C.

Allowed temperature rise: 125 − 50 = 75 K.
Allowed total thermal resistance: 75 / 10.6 ≈ 7.1 K/W.
Left for the heatsink: 7.1 − 0.5 − 0.3 ≈ 6.3 K/W. Choose a heatsink rated at or below about 6.3 K/W for the available airflow.

At 200 kHz the same device would lose 27.4 W, allowing only 75 / 27.4 ≈ 2.7 K/W in total and leaving about 1.9 K/W for a much larger heatsink. The thermal design and the switching frequency are one decision, not two.

Exercise 1: switching loss at 100 kHz

Using the MOSFET in the worked example, what are its switching loss and total loss at 100 kHz?

Answer

Switching: ½ × 400 × 10 × 50 ns × 100 kHz = 10 W. Output capacitance: ½ × 150 pF × 400² × 100 kHz = 1.2 W. With 5 W of conduction loss the total is 16.2 W.

Exercise 2: dead-time error

A three-phase IGBT inverter runs at 16 kHz from a 700 V DC link with a dead time of 1 µs. What is the average voltage error from dead time?

Answer

1 µs × 16,000 × 700 = 11.2 V, with a sign that follows each phase current's direction. Left uncompensated, it causes visible distortion of the output current near its zero crossings.

Exercise 3: how hot does it run?

A device loses 15 W. Its junction-to-case resistance is 0.4 K/W, the interface 0.2 K/W and the heatsink 3 K/W. What is the junction temperature at an ambient of 45 °C?

Answer

T_j = 45 + 15 \times (0.4 + 0.2 + 3) = 45 + 54 = 99 °C, comfortably below a 150 °C or 175 °C rating.

Key takeaways

PWM controls a converter through its duty cycle D = t_{on}/T_s at a fixed switching frequency.
With an inductive load, voltage and current overlap during every hard transition; that overlap energy is the switching loss.
Conduction loss doesn't depend on frequency; switching, capacitive, recovery and gate losses all grow in proportion to it.
Dead time prevents shoot-through but adds diode loss and a voltage error of about t_d f_s V_{dc}.
Junction temperature is ambient plus loss times the sum of the thermal resistances, so frequency and heatsink size must be chosen together.